The trend of the electronic industry is to provide increasingly powerful electronic circuitry. A major reason of this trend is that electronic components, such as integrated circuits, are becoming increasingly complex. Thus, printed circuit board layouts are becoming more densely packed with electronic components. Moreover, electronic circuitry often requires power sources having different power voltages, where isolated electronic circuits may require separate power supplies for circuit stability.
A multi-layer printed circuit board (PCB) is often used to support complex electronic circuitry. A multi-layer PCB has a plurality of layers, ranging from a few layers to approximately a hundred layers. Each layer may support signal connectivity and/or power connectivity, where layers may be connected to each other using plated holes. A multi-layer PCB is typically formed by laminating sections of core material in which copper is deposited on each side of the core material. Electronic components typically reside on the outside layers of the PCB. The inner layers typically support signal connectivity between the electronic components as well as power connectivity between power sources and electronic components. In order to provide connectivity between layers of the multi-layer PCB, power vias and signal vias are positioned to complete desired connectivity. (A via is essentially a metal lined hole whose terminations can be made on both outer layers, on one inner layer and one outer layer, or within any of the PCB's inner layers.) At least one layer, called a split plane layer, is dedicated to support the distribution of multiple power potentials (or ground potentials) for the electronic components. As the number of power potentials for the multi-layer PCB increases, the complexity of the split plane layer layout increases.
The creation of a split plane layer may require substantial manual intervention by the designer and is often time consuming. The plane shape of the split plane layer is based upon the positioning of each power via. Moreover, the designer must assure that every pin of an electronic component receives the correct amount of current by verifying that each area of connectivity has sufficient area and that signal vias do not disrupt the anticipated current handling capability. When the designer begins to create a split plane layer, the designer must create a plane shape based on the present location of each power potential's vias.
With the increasing complexity of electronic circuitry, the effort to design a split plane layer increases. Thus, methods and apparatuses that reduce this effort are beneficial in the design of multi-layer printed circuit boards.